Alloy diffusion barrier layer

ABSTRACT

A microelectronic device includes a reflow structure. The reflow structure has a copper-containing member and a solder member, and a barrier layer between them. The barrier layer has metal grains, with a diffusion barrier filler between the metal grains. The metal grains include at least a first metal and a second metal, each selected from nickel, cobalt, lanthanum, and cerium, with each having a concentration in the metal grains of at least 10 weight percent. The diffusion barrier filler includes at least a third metal, selected from tungsten and molybdenum. A combined concentration of tungsten and molybdenum in the diffusion barrier filler is higher than in the metal grains to provide a desired resistance to diffusion of copper. The barrier layer includes 2 weight percent to 15 weight percent of the combined concentration of tungsten, and molybdenum. A bump bond structure and a lead frame package are disclosed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of patent application Ser. No.15/954,254, filed Apr. 16, 2018, which claims the benefit of ProvisionalApplication No. 62/561,070 filed Sep. 20, 2017, the contents of all ofwhich are herein incorporated by reference in its entirety.

FIELD OF THE DISCLOSURE

This disclosure relates to the field of microelectronic devices. Moreparticularly, this disclosure relates to barrier layers inmicroelectronic devices.

BACKGROUND OF THE DISCLOSURE

Many microelectronic devices have bump bond structures with copperpillars and solder bumps on the copper pillars, to provide connectionsto lead frames and other package terminals. Increasing demand forminiaturization of the copper pillars and higher pillar densities hasincreased the current density through the copper pillars and the solderbumps. Electromigration failure in bump bond structures with solderdirectly contacting the copper pillars has been attributed to thedepletion of intermetallic compounds at the interface of the copper andthe solder, which usually contains tin. These failures have led to useof barrier layers between the copper and the solder. Nickel, nickelphosphorus, nickel phosphorus tungsten, nickel iron phosphorus, nickelrhenium phosphorus, cobalt phosphorus, and cobalt tungsten phosphorus,have been reported as potential candidates for the barrier layers. Eachof these layers suffer from disadvantages. Nickel forms a brittleintermetallic compound of Ni₃Sn₄ which can pose reliability issues. Eventhough a thin nickel layer on copper can reduce the interfacialreactions with tin-rich solders at a low reflow temperature, it may notbe so effective when a reflow process is performed at a highertemperature and for a longer period. The remaining proposed barrierlayer compositions react with tin-rich solder, leading to formation ofbrittle intermetallic compounds, resulting in fractures or voids in thebump bond structure.

SUMMARY OF THE DISCLOSURE

The present disclosure introduces a microelectronic device having areflow structure with a copper-containing member and a solder member,and a barrier layer between the copper-containing member and the soldermember. The barrier layer has metal grains, and a diffusion barrierfiller between the metal grains.

The metal grains include at least a first metal and a second metalhaving a concentration in the metal grains of at least 10 weight percenteach. The first metal and the second metal are selected from nickel,cobalt, lanthanum, and cerium. A combined concentration of nickel,cobalt, lanthanum, and cerium in the metal grains is at least 85 weightpercent.

The barrier layer includes at least a third metal, selected fromtungsten and molybdenum. The barrier layer includes at least 2 weightpercent and less than 15 weight percent of the combined concentration oftungsten, and molybdenum. A combined concentration of tungsten andmolybdenum in the diffusion barrier filler is higher than a combinedconcentration of tungsten and molybdenum in the metal grains.

In one aspect, the reflow structure may be manifested as a bump bondstructure wherein the copper-containing member may be manifested as acopper-containing pillar, and the solder member may be manifested as asolder bump. In another aspect, the reflow structure may be manifestedas a lead frame package wherein the copper-containing member may bemanifested as a copper-containing lead frame terminal, and solder membermay be manifested as a solder layer.

The barrier layer may be formed by concurrently plating the first metal,the second metal, and the third metal onto the copper-containing member.The third metal diffuses out of interiors of the metal grains toaccumulate in the diffusion barrier filler between the metal grains.

BRIEF DESCRIPTION OF THE VIEWS OF THE DRAWINGS

FIG. 1 is a cross section of an example microelectronic device includinga copper-containing pillar, a barrier layer, and a solder bump.

FIG. 2A through FIG. 2E are cross sections of a microelectronic deviceincluding a copper-containing pillar, a barrier layer, and a solderbump, depicted in stages of an example method of formation.

FIG. 3 depicts an example reverse pulse plating waveform.

FIG. 4A and FIG. 4B depict a microelectronic device having a lead frameincluding a barrier layer, depicted in stages of an example method offormation.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

The present disclosure is described with reference to the attachedfigures. The figures are not drawn to scale and they are provided merelyto illustrate the disclosure. Several aspects of the disclosure aredescribed below with reference to example applications for illustration.It should be understood that numerous specific details, relationships,and methods are set forth to provide an understanding of the disclosure.The present disclosure is not limited by the illustrated ordering ofacts or events, as some acts may occur in different orders and/orconcurrently with other acts or events. Furthermore, not all illustratedacts or events are required to implement a methodology in accordancewith the present disclosure.

A microelectronic device includes a reflow structure, which may be, forexample, a bump bond structure, or a lead frame package. The reflowstructure has a copper-containing member and a solder member, and abarrier layer between the copper-containing member and the soldermember. The barrier layer has metal grains, with a diffusion barrierfiller between the metal grains. The solder member may include tin,along with other metals such as bismuth, indium, or silver. The soldermember has a reflow temperature between 150° C. and 400° C. The soldermember may include at least 25 weight percent tin to provide a desiredreflow temperature and desired properties such as hardness andelectrical conductivity.

The metal grains include at least a first metal and a second metal, witheach having a concentration in the metal grains of at least 10 weightpercent each. The first metal and the second metal are selected fromnickel, cobalt, lanthanum, and cerium. The metal grains may includeadditional metals from the nickel, cobalt, lanthanum, and cerium group.A combined concentration of nickel, cobalt, lanthanum, and cerium in themetal grains is at least 85 weight percent. The metal grains may formmixed tin intermetallic compounds that are more ductile than Ni₃Sn₄,advantageously reducing reliability problems.

The barrier layer includes at least 2 weight percent of a third metal,selected from tungsten and molybdenum. The barrier layer may includeboth tungsten and molybdenum. A combined concentration of tungsten andmolybdenum in the diffusion barrier filler is higher than a combinedconcentration of tungsten and molybdenum in the metal grains to providea desired resistance to diffusion of copper. The barrier layer includesless than 15 weight percent of the combined concentration of tungstenand molybdenum. Having at least 2 weight percent of tungsten andmolybdenum in the barrier layer may advantageously provide that thediffusion barrier filler reduces diffusion of copper through the barrierlayer compared to an equal thickness of nickel. Having less than 15weight percent of tungsten and molybdenum maintains an electricalconductivity of the barrier layer above a desired value.

One example is disclosed herein in which the reflow structure may bemanifested as a bump bond structure, the copper-containing member may bemanifested as a copper-containing pillar, and the solder member may bemanifested as a solder bump. Another example is disclosed herein inwhich the reflow structure may be manifested as a lead frame packagewherein the copper-containing member may be manifested as acopper-containing lead frame terminal, and solder member may bemanifested as a solder layer. Other manifestations of the reflowstructure with the barrier layer are within the scope of thisdisclosure.

The barrier layer may be formed by concurrently plating the first metal,the second metal, and the third metal onto the copper-containing member.The third metal diffuses out of interiors of the metal grains toaccumulate in the diffusion barrier filler between the metal grains.

For the purposes of this disclosure, it will be understood that, if anelement is referred to as being on another element, it may be directlyon the other element, or intervening elements may be present.

FIG. 1 is a cross section of an example microelectronic device includinga copper-containing pillar, a barrier layer, and a solder bump. Themicroelectronic device 100 includes a dielectric layer 102, which mayinclude one or more dielectric sublayers of silicon dioxide, siliconnitride, or similar dielectric material. The microelectronic device 100includes interconnects 104 in the dielectric layer 102. Theinterconnects 104 may be parts of a top interconnect level, or may beparts of a redistribution layer. Bond pads 106 of the microelectronicdevice 100 are electrically coupled to the interconnects 104. The bondpads 106 may include aluminum, copper, nickel, or other metal suitablefor bond pads. A protective overcoat (PO) layer 108 is located on thedielectric layer 102. The PO layer 108 exposes at least a portion ofeach bond pad 106. The PO layer 108 may include one or more layers ofsilicon dioxide, silicon nitride, silicon oxynitride, polyimide,aluminum oxide, or other dielectric material providing a barrier towater vapor and other contaminants.

The microelectronic device 100 includes bump bond structures 110 on thebond pads 106. Each bump bond structure 110 includes an under bumpmetallization (UBM) layer 112 which makes electrical contact to thecorresponding bond pad 106. The UBM layer 112 may include titanium,nickel, palladium, copper, or other metals suitable for a metal layerproviding adhesion to the bond pad 106 and a plating surface for thebump bond structures 110.

Each bump bond structure 110 further includes a copper-containing pillar114, referred to herein as the copper pillar 114, on the correspondingUBM layer 112. The copper pillar 114 may include primarily copper with afew percent other elements, or may consist essentially of copper.

Each bump bond structure 110 includes a barrier layer 116 coupled to thecorresponding copper pillar 114, and a solder bump 118 of solder coupledto the barrier layer 116, so that the barrier layer 116 separates thecopper pillar 114 from the solder bump 118. The solder bump 118 includesmetals which provide a reflow temperature between 150° C. and 400° C.For example, the solder bump 118 may include tin, and may include othermetals such as bismuth, indium, or silver. Lead has previously been usedin solder bumps, but at the time of this disclosure, lead is generallynot used in solder bumps due to health and environmental concerns.

The barrier layer 116 may be, for example, 2 microns to 20 micronsthick, to provide a desired balance between isolation of the copper fromthe metals in the solder bump and a fabrication cost and complexity ofthe bump bond structures 110. The barrier layer 116 includes metalgrains 120 and a diffusion barrier filler 122 between the metal grains120. The metal grains 120 include at least a first metal and a secondmetal, selected from nickel, cobalt, lanthanum, and cerium. The firstmetal and the second metals each have a concentration in the metalgrains 120 of at least 10 weight percent each. The metal grains 120 mayinclude any combination of nickel, cobalt, lanthanum, and cerium. Acombined concentration of nickel, cobalt, lanthanum, and cerium in themetal grains 120 is at least 85 weight percent. Different compositionsof the metal grains 120 may be selected to provide desired balancesbetween reliability and fabrication cost. For example, the metal grains120 may include at least 10 weight percent nickel and at least 10 weightpercent cobalt, and less than 1 weight percent lanthanum and cerium.

The barrier layer 116 includes a third metal, selected from tungsten andmolybdenum. The diffusion barrier filler may include both tungsten andmolybdenum. A combined concentration of tungsten and molybdenum in thediffusion barrier filler 122 is higher than a combined concentration oftungsten and molybdenum in the metal grains 120. The barrier layer 116includes at least 2 weight percent and less than 15 weight percent totalconcentration of tungsten, and molybdenum. Different compositions of thediffusion barrier filler 122 may be selected to provide desired balancesbetween reliability and fabrication cost. For example, the diffusionbarrier filler 122 may include tungsten, with very little molybdenum.

The barrier layer 116 may provide two advantages for the microelectronicdevice 100. First, the metal grains 120 may combine with tin in thesolder bump 118 to form mixed tin intermetallic compounds 124,precluding or reducing formation of the brittle tin-nickel intermetalliccompound Ni₃Sn₄. The mixed tin intermetallic compounds 124 are moreductile than Ni₃Sn₄, and thus less prone to breaking and forming voidswhen the bump bond structure 110 is stressed, advantageously reducingreliability problems. Second, the tungsten or molybdenum in thediffusion barrier filler 122 reduces diffusion of copper through thebarrier layer 116; copper has a lower rate of diffusion through thebarrier layer 116 than through an equal thickness of nickel.

FIG. 2A through FIG. 2E are cross sections of a microelectronic deviceincluding a copper-containing pillar, a barrier layer, and a solderbump, depicted in stages of an example method of formation. Referring toFIG. 2A, the microelectronic device 200 of the instant example includesa dielectric layer 202, and interconnects 204 in the dielectric layer202. Bond pads 206 of the microelectronic device 200 are electricallycoupled to the interconnects 204. A PO layer 208 is located on thedielectric layer 202, exposing at least a portion of each bond pad 206.

A UBM layer 212 is formed over the PO layer 208 and on the bond pads 206where exposed by the PO layer 208. The UBM layer 212 may include anadhesion sublayer with titanium or other metal that provides goodadhesion to the PO layer 208 and makes a low resistance and reliableelectrical connection to the bond pads 206. The UBM layer 212 mayfurther include a seed sublayer on the adhesion sublayer; the seedsublayer may include nickel, copper, or other metal to provide a lowsheet resistance layer for a subsequent plating operation. The UBM layer212 may be formed by sequential sputtering processes, for example.

A plating mask 226 is formed on the UBM layer 212. The plating mask 226exposes areas over the bond pads 206 for bump bond structures 210. Theplating mask 226 may include photoresist, and may be formed by aphotolithographic process. Alternatively, the plating mask 226 mayinclude organic polymers and may be formed by an additive process suchas an ink jet process.

The UBM layer 212 is exposed to a copper plating bath 228 which includescopper. Copper may be added to the copper plating bath 228, as indicatedin FIG. 2A, in the form of copper sulfate, with an acid to provide adesired conductivity of the copper plating bath 228. Wetting agents,levelers, accelerators, or suppressors may be added to the copperplating bath 228 to provide a desired profile and surface finish.Current is flowed from the copper plating bath 228 to the UBM layer 212,resulting in copper being plated from the copper plating bath 228 ontothe UBM layer 212 where exposed by the plating mask 226 to form acopper-containing pillar 214, referred to herein as the copper pillar214, on the UBM layer 212 in each bump bond structure 210.

Referring to FIG. 2B, the plating mask 226 is left in place, and thecopper pillars 214 are exposed to a barrier plating bath 230. Thebarrier plating bath 230 includes at least two metals selected fromnickel, cobalt, lanthanum, and cerium, and at least one metal selectedfrom tungsten and molybdenum. Nickel may be added to the barrier platingbath 230, as indicated in FIG. 2B, in the form of nickel sulfate. Cobaltmay be added to the barrier plating bath 230 in the form of cobaltsulfate. Lanthanum may be added to the barrier plating bath 230 in theform of lanthanum oxide or lanthanum chloride. Cerium may be added tothe barrier plating bath 230 in the form of cerium sulfate. Tungsten maybe added to the barrier plating bath 230 in the form of sodiumtungstate. Molybdenum may be added to the barrier plating bath 230 inthe form of sodium molybdate. The barrier plating bath 230 may furtherinclude additives such as wetting agents, levelers, accelerators, orsuppressors. The metals in the barrier plating bath 230 are plated ontothe copper pillars 214 to form a barrier layer 216 on the correspondingcopper pillar 214 in each bump bond structure 210. The barrier layer 216has the composition and structure disclosed in reference to the barrierlayer 116 of FIG. 1.

A composition of the barrier plating bath 230 may be selected to providea desired balance between reliability and fabrication cost. In anexample, the barrier plating bath 230 may include nickel and cobalt, andmay be essentially free of lanthanum and cerium. In another example, thebarrier plating bath 230 may include tungsten, and may be essentiallyfree of molybdenum.

The barrier layer 216 may be formed using a reversed pulse platingprocess, sometimes referred to as a reverse pulse plating process.During a reversed pulse plating process applied to the barrier platingbath 230, forward current is flowed in one or more forward pulses fromthe barrier plating bath 230 to the copper pillars 214, plating themetals from the barrier plating bath 230 onto the copper pillars 214 toform a portion of the barrier layers 216, resulting in apartially-formed barrier layer 216. An amplitude and a duration of theforward pulses are selected to provide a desired metal grain size in thepartially-formed barrier layer 216. After the forward pulses, reversecurrent is flowed in one or more reverse pulses from the copper pillars214 to the barrier plating bath 230, selectively removing the tungstenand molybdenum from the surface of the partially-formed barrier layer216. An amplitude and a duration of the reverse pulses are selected toremove a desired amount of the tungsten and molybdenum. Tungsten andmolybdenum diffuse from interiors of the metal grains in the barrierlayer 216 and accumulate to form a diffusion barrier filler betweengrain boundaries of the metal grains. Thus, the reversed pulse platingprocess forms the barrier layer 216 with the composition and structuredisclosed in reference to the barrier layer 116 of FIG. 1.

FIG. 3 depicts an example reverse pulse plating waveform. The waveformdepicts current density on the vertical axis as a function of time onthe horizontal axis. In this example waveform, four forward pulses areapplied, followed by four reverse pulses. A forward current density ofthe forward pulses may have a greater amplitude than a reverse currentdensity of the reverse pulses, to provide a higher forward voltagebetween the barrier plating bath 230 and the copper pillars 214 of FIG.2B, to plate the metals in the barrier plating bath 230 in a desiredcomposition. The lower amplitude of the reverse current density of thereverse pulses may provide sufficient voltage between the barrierplating bath 230 and the copper pillars 214 to remove the tungsten andmolybdenum in higher oxidation states, for example, W⁺⁶ and Mo⁺⁶,leaving a greater proportion of the nickel, cobalt, lanthanum, andcerium, having lower oxidation states, in the partially-formed barrierlayer 216 of FIG. 2B. The forward current density may range from about0.5 amps per square centimeter (A/cm²) to about 1.0 A/cm², and theduration of each forward pulse may range from 10 milliseconds to 50milliseconds, with a duty cycle of 75 percent to 100 percent, to providea desired metal grain structure in the barrier layer 216. The reversecurrent density may be 35 percent to 60 percent of the forward currentdensity, and the duration of the reverse pulses may range from 30percent to 70 percent of the forward pulse duration, with a duty cycleof 60 percent to 100 percent, to provide a desired amount of tungstenand molybdenum in the diffusion barrier filler. The combination of theforward pulses followed by the reverse pulses is repeated to form thebarrier layers 216 with a desired thickness.

Referring to FIG. 2C, the plating mask 226 is left in place, and thebarrier layers 216 are exposed to a solder plating bath 232. The solderplating bath 232 includes metals such as tin and silver, as indicated inFIG. 2C, and may include other metals, such as bismuth. The solderplating bath 232 may also include wetting agents, levelers,accelerators, or suppressors. Other formulations for the solder platingbath 232 are within the scope of the instant example. Current is flowedfrom the barrier layers 216 to the solder plating bath 232, resulting insolder being plated from the solder plating bath 232 onto the barrierlayers 216 to form a solder bump 218 on the barrier layer 216 in eachbump bond structure 210.

The plating mask 226 is subsequently removed, leaving the bump bondstructures 210 in place. The plating mask 226 may be removed bydissolution in organic solvents or organic acids, or exposure to oxygenradicals or ozone, for example. After the plating mask 226 is removed,the UBM layer 212 is removed where exposed by the copper pillars 214,leaving the UBM layer 212 between the copper pillars 214 and the bondpads 206. The UBM layer 212 may be removed by a timed wet etch process,for example.

Referring to FIG. 2D, the bump bond structures 210 may optionally beheated to reflow the solder bumps 218. The bump bond structures 210 maybe heated by a radiant heating process 234, as indicated in FIG. 2D.Alternatively, the bump bond structures 210 may be heated in a chainfurnace or other process that heats an ambient contacting the bump bondstructures 210. Reflowing the solder bumps 218 may require heating thesolder bumps 218 to a temperature of 150° C. to 400° C., depending onthe composition of the solder bumps 218. Reflowing the solder bumps 218may provide a stronger connection between the solder bumps 218 and thebarrier layers 216. The structure and composition of the barrier layers216, as disclosed in reference to FIG. 1, may advantageously reduceformation of undesired intermetallic compounds of copper and tin and ofnickel and tin, during the reflow of the solder bumps 218.

Referring to FIG. 2E, the microelectronic device 200 is bump bonded to alead frame 236. The lead frame 236 may be, for example, a pre-moldedlead frame 236 with mold compound 238 between metal terminals 240. Themetal terminals 240 may include copper, for example. In the bump bondingprocess, the solder bumps 218 are heated to reflow the solder, to makesolder connections to the metal terminals 240. The solder bumps 218 maybe heated, for example, by a radiant heating process 242, as indicatedin FIG. 2E, or by an ambient heating process such as a chain furnaceprocess. Bump bonding the microelectronic device 200 to the lead frame236 may require heating the solder bumps 218 to a temperature of 150° C.to 400° C., depending on the composition of the solder bumps 218.Pressure may optionally be applied to the microelectronic device 200 toassist the bump bonding process. The temperature required to bump bondthe microelectronic device 200 to the lead frame 236 may be higher thanthe temperature required to reflow the solder bumps 218 as disclosed inreference to FIG. 2D. The structure and composition of the barrierlayers 216 may advantageously reduce formation of undesiredintermetallic compounds of copper and tin and of nickel and tin, duringthe bump bonding process. The structure and composition of the barrierlayers 216 may further reduce formation of brittle intermetalliccompounds of nickel and tin, which may improve reliability of the bumpbond structures 210 during mechanical and thermal stress between thelead frame 236 and the microelectronic device 200.

FIG. 4A and FIG. 4B depict a microelectronic device having a lead frameincluding a barrier layer, depicted in stages of an example method offormation. Referring to FIG. 4A, the microelectronic device 400 includesthe lead frame 436. In the instant example, the lead frame 436 mayinclude primarily copper. A first barrier layer 416 is formed on thelead frame 436 to cover an area on the lead frame 436 for a solderconnection. The first barrier layer 416 may be formed by a platingprocess, for example, as disclosed in reference to FIG. 2B and FIG. 2C.Other processes for forming the first barrier layer 416, such as directcurrent (DC) electroplating, or electroless plating, are within thescope of the instant example. The first barrier layer 416 has thestructure and composition as disclosed in reference to FIG. 1. The firstbarrier layer 416 may be localized to the area for the solderconnection, as depicted in FIG. 4A, or may cover the lead frame 436.

The microelectronic device 400 further includes a clip 444 with a secondbarrier layer 446. The second barrier layer 446 covers an area on theclip 444 for the solder connection. The second barrier layer 446 mayhave a structure and composition similar to the first barrier layer 416,and may be formed by a similar process.

The microelectronic device 400 further includes a solder material 418for the solder connection. The solder material 418 may be manifested asa solder preform or a solder paste, for example. The solder material 418may include tin, silver, bismuth, or other metals.

The microelectronic device 400 is formed by contacting the lead frame436 to the solder material 418 through the first barrier layer 416, andcontacting the clip 444 to the solder material 418 through the secondbarrier layer 446, as indicated in FIG. 4A.

Referring to FIG. 4B, the microelectronic device 400 is heated, causingthe solder material 418 to reflow and make the solder connection betweenthe lead frame 436 and the clip 444. The microelectronic device 400 maybe heated by a radiant heat process 442 as indicated in FIG. 4B, or by afurnace process.

The structure and composition of the first barrier layer 416 mayadvantageously reduce formation of undesired intermetallic compounds ofcopper and tin and of nickel and tin, during the solder reflow process.The structure and composition of the first barrier layer 416 may furtherreduce formation of brittle intermetallic compounds of nickel and tin,which may improve reliability of the microelectronic device 400 duringmechanical and thermal stress between the lead frame 436 and the clip444. In versions of the instant example in which the second barrierlayer 446 has a structure and composition similar to the first barrierlayer 416, the same advantages may accrue.

While various embodiments of the present disclosure have been describedabove, it should be understood that they have been presented by way ofexample only and not limitation. Numerous changes to the disclosedembodiments can be made in accordance with the disclosure herein withoutdeparting from the spirit or scope of the disclosure. Thus, the breadthand scope of the present invention should not be limited by any of theabove described embodiments. Rather, the scope of the disclosure shouldbe defined in accordance with the following claims and theirequivalents.

What is claimed is:
 1. A microelectronic device, comprising: a bond padelectrically connected to a semiconductor die; copper on the bond pad; alayer on the copper, the layer including: at least 10 weight percent ofa first metal selected from the group consisting of nickel, cobalt,lanthanum, and cerium; at least 10 weight percent of a second metal,different from the first metal, selected from the group consisting ofnickel, cobalt, lanthanum, and cerium; and at least 2 weight percent ofa third metal selected from the group consisting of tungsten andmolybdenum; and solder on the layer.
 2. The microelectronic device ofclaim 1, wherein the third metal is in between the grains of the firstmetal or the grains of the second metal.
 3. The microelectronic deviceof claim 1, wherein the third metal is in between the grains of thefirst metal and the grains of the second metal.
 4. The microelectronicdevice of claim 1 further comprising intermetallic compounds between thesolder and the layer.
 5. The microelectronic device of claim 1, whereina combined concentration of tungsten and molybdenum in the layer isgreater than 2 weight percent and less than 15 weight percent.
 6. Themicroelectronic device of claim 1, wherein: the layer includes at least10 weight percent of nickel; the layer includes at least 10 weightpercent of cobalt; and the layer includes less than 1 weight percentlanthanum and cerium.
 7. The microelectronic device of claim 1, whereinthe layer includes less than 1 weight percent molybdenum.
 8. Themicroelectronic device of claim 1, wherein a thickness of the layer isbetween 2 microns and 20 microns, and wherein the solder includes atleast 25 weight percent tin.
 9. The microelectronic device of claim 4,wherein the intermetallic compound is more malleable than Ni₃Sn₄. 10.The microelectronic device of claim 4, wherein the intermetalliccompound does not include copper and tin.
 11. A microelectronic device,comprising: a bond pad electrically connected to a semiconductor die;copper on the bond pad; a layer on the copper, the layer including: atleast 10 weight percent of a first metal selected from the groupconsisting of lanthanum, and cerium; at least 10 weight percent of asecond metal, different from the first metal, selected from the groupconsisting of lanthanum, and cerium; and at least 2 weight percent of athird metal selected from the group consisting of tungsten andmolybdenum; and solder on the layer.
 12. The microelectronic device ofclaim 11, wherein the third metal is in between the grains of the firstmetal or the grains of the second metal.
 13. The microelectronic deviceof claim 11, wherein the third metal is in between the grains of thefirst metal and the grains of the second metal.
 14. A microelectronicdevice, comprising: a bond pad electrically connected to a semiconductordie; copper on the bond pad; a layer on the copper, the layer including:a first metal selected from the group consisting of lanthanum, andcerium; and a second metal selected from the group consisting oftungsten and molybdenum in between the first metal; and solder on thelayer.
 15. The microelectronic device of claim 11, wherein the secondmetal encloses the first metal from a cross-sectional view of themicroelectronic device.
 16. The microelectronic device of claim 11further comprising intermetallic compounds between the solder and thelayer.
 17. The microelectronic device of claim 16, wherein theintermetallic compound does not include copper and tin.